At the boundary between the electrical chips and the optical system, an
optoelectronic transducer must convert
the signal between the two domains. There
are many types of devices that
have been invented to accomplish this
task for both the transmitter (EO) and receiver (OE). The function of the optoelectronic transmitter as a converter between the electrical
and optical domains requires its compatibility
with both systems. This double set of constraints presents a
challenge to the designer.
This chapter lays out the requirements and restrictions placed on a transmitter, both from the electrical and optical system
perspective. These requirements highlight the usefulness of
two competing transmitter strategies: vertical-cavity surface-emitting lasers (VCSELs) and surface-normal modulators (with
an external laser source). Each device
offers advantages and disadvantages for optical interconnects. Though most current
optical int erconnect implementations utilize VCSELs, modulators may
prove more practical in the long run. Several modulator designs have been
proposed, fabricated and tested by other groups, and these will be reviewed
quickly with an eye towards the next chapters describing our solutions.
DEVICE REQUIREMENTS FOR OPTICAL INTERCONNECT TRANSMITTERS
ELECTRICAL REQUIREMENTS
The optoelectronic transmitter device must be compatible with the driving electrical signal. Standard CMOS is the preferred
process for computing electronics due to its high speed and low power consumption. The future design plans of CMOS chips are
laid out in the ITRS Roadmap [1].
Since optical
interconnects will not be needed
until the bit rates rise
somewhat higher, we can focus our attention
on the CMOS technology that will emerge in the year 2009 and after.
The major factors for optoelectronic transmitters will be the low
voltage, high bit
rate, and low power consumption requirements.
Since an optical interconnect system
is trying to displace an all-electrical system of interconnects, it will be necessary to beat or
match the
performance of
all-electrical systems
or to add
useful novel capabilities, without introducing significant problems.
Ideally, the electrical
chips can be relatively unchanged in
these major areas.
Digital
voltage level
According to the ITRS Roadmap,
the digital voltage swing (the
voltage difference between a digital one and
a digital zero) of future CMOS is
expected to reach 1 V in 2008 and 0.8 V in 2015 [1].
Though separate
higher voltage power lines could be run through
the chip and advanced circuit techniques could potentially be used, power consumption
requirements would likely limit
these techniques. Driving
the optoelectronic transmitters using the native logic level voltage reduces the complexity and power consumption
to reasonable values.
The requirement of low voltage
will severely restrict
the reasonable transmitter
designs we can investigate for
these applications. Most
published modulator
designs do not properly
anticipate such a low voltage
driving signal,
as we shall see. In order to operate at such a low voltage
drive,
the design engineers often have
traded away desirable qualities such as contrast
ratio, wavelength range, or
the surface-normal geometry.
Off-chip single-channel data rate
One of the main problems with
electrical interconnects,
discussed in Chapter 2, is
the limited aggregate bandwidth. The “aspect-ratio” limit becomes a problem
when the total data transfer rate gets extremely high.
For off-chip electrical
traces, the single-
channel bit rate becomes a problem
in the multi-GHz range. Since
optical interconnects are
not likely to be used in practical systems until the CMOS chips
have advanced to
these speeds, the bit rate of a single channel
should be expected
to be approximately 5
Gbps or greater. The ITRS predicts
an off-chip (i.e. chip-to-board) data transmission speed of about 10 GHz
in 2010, increasing above 35 GHz by 2016 [1].
A realistic
optoelectronic transmitter
will operate at these frequencies
and higher.
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