ALGAAS MQW SURFACE-NORMAL MODULATORS PART 2

FABRICATION AND INTEGRATION

The following section describes the seven-mask process used to fabricate AlGaAs modulators for optical interconnects.  Although an overview of the fabrication of these devices is presented below, the details are included in Appendix A.   Note that all lithographic procedures were performed with a standard positive photoresist (usually Shipley AZ-4620) and traditional photolithography.

The fabrication of the AlGaAs modulators began with an etch into the n-AlGaAs layer, using the non-selective etch system of sulfuric acid, hydrogen peroxide, and water. Ohmic n-contacts and p-contacts were deposited and lifted off.   In order to reduce the capacitance of the diodes, the metallic p-contact can be used as a mask during a timed dry etch which removes p-doped semiconductor layers, etching into the intrinsic region. Indium was evaporated onto the chip and lifted off to define the metallic “glue” bumps that are used in the flip-chip bonding process.   The mesa structures were defined by another non-selective etch which passed through the AlGaAs etchstop into the GaAs substrate.

For testing purposes, metal traces (Cr/Au) can be evaporated onto a silicon or glass dummy substrate.  For use with a real CMOS chip, the CMOS flip-chip bond pads must  have  a  special  combination  of  metals  evaporated  onto  them.     Performing lithography on such small chips (2 mm x 2 mm) is a practical challenge in our laboratory, but the same step could be done at the wafer level (before dicing) in a commercial implementation.

The flip-chip bonding was performed using a Research Devices (Besi Die Handling) M8-A bonder.  This machine was able to align the two chips to within 2 µm of each other in both lateral directions, while maintaining the parallel orientation of the two samples.  The built-in computer controlled the bonding pressure, temperature and timing of each step.  A typical bonding program pressed the chips together using about 2 g per indium bump (12 µm x 12 µm) for 30 sec.  Then the temperature was increased to 140°C on both chips while maintaining a similar pressure.  Finally, the pressure was released and the chips were cooled to 65°C.  The completed bond was a high quality electrical contact between the CMOS flip-chip pads and the ohmic contacts of the optoelectronic device resulting from an alloying of the indium and gold.   However, the mechanical strength of the bond was somewhat poor, so a low-viscosity epoxy (Tra-Bond 2113) was wicked in between the two chips and cured.  This offered two benefits: the mechanical strength of the epoxy plus the protection of the sides of the devices from the substrate removal step which was to come next.

The substrate removal consisted of two wet chemical etches.  The first step etched the GaAs at a fast rate using H2SO4:H2O2:H2O (1:1:8).  More recently, a stir bar was used to achieve more uniform lateral etching during this step.   After 40-50 min, the GaAs substrate was etched down to the point at which only about 50 µm remained.   At this point, the chip was moved to a selective etchant, C6H8O7:H2O2  (4:1), citric acid and hydrogen peroxide, at a temperature of 45-65°C [5].  Higher temperature corresponded to a faster etch rate and less selectivity.  Thus, as the chip neared completion, which was determined visually, the temperature was reduced to improve the selectivity.  The final step removed the AlGaAs etchstop, using HCl:H2O (1:1), which selectively dissolved AlGaAs  without  etching  GaAs.    This  left  an  optically  flat  surface  on  top  of  the modulator.  All that remained was to burn off some of the epoxy where it obscured the metal pads that are used for probing the devices (or the wire bond pads around the edge of CMOS chips).  This was done using a dry etch mixture of CF4 and O2 (1:4).

At this point, the devices were ready for testing.   A probe station enabled a voltage to be placed across a row of devices.   In fact, on the test structures, it was possible to place the devices in forward bias at which point they behave like light emitting diodes (LEDs).  By forward biasing all the devices in an array simultaneously, it was simple to observe the yield of the device array.   Greater than 97 % yield was observed in the best test chips, though better results (> 4300 working devices on a single chip) have been published by the group at Bell Labs [3], indicating improvements are certainly possible.  

To investigate the properties of one device, interesting information was obtained by varying both the voltage bias across the device and the wavelength of the incident CW laser while recording the reflectivity of the modulator.   For this purpose a tunable Ti:Sapphire  laser  was  employed  and  the  measurement  was  entirely  controlled  by  a computer.  Fig. 4.8 is a typical plot from such an experiment. 

Two effects can clearly be seen in this plot.   First there is the QCSE, which appears as the change in absorption between 845 nm and 855 nm due to the changing voltage.   More dramatic, though, is the second effect – the dips in overall reflectivity around 838 nm and 888 nm and the reflectivity peak at 860 nm.  This is caused by the Fabry-Perot cavity formed between the lower mirror of the Au p-contact and the top mirror of the semiconductor-air interface (about a 30 % reflector).  On the device shown in Fig 4.8, this effect is clearly a nuisance, reducing both the change in reflectivity and the contrast ratio.   Many groups have avoided this problem by depositing an anti- reflection (AR) coating to the top surface.  However, it is possible to turn this nuisance into an advantage by specifically designing the Fabry-Perot cavity resonance to occur in the  same  wavelength  range  as  the  device  is  supposed  to  operate  (~845-855 nm). Unfortunately, a few practical hurdles had to be overcome to achieve this.