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Minggu, 08 Maret 2015

SYSTEM INTEGRATION OPTIC




 Integration of optoelectronics and electronics

Efforts  to  develop  monolithic  optical  transmitters  on  silicon  substrates  have largely failed to overcome the inefficiency due to the indirect bandgap of silicon and the difficulty of growing high-quality III-V material on silicon.   Si-based lasers or AlGaAs/GaAs lasers grown on Si substrates have never achieved the lifetimes and reliability necessary for use in systems.   Though some experiments have succeeded in fabricating all-Si modulators [10, 11] or AlGaAs/GaAs surface-normal modulators on Si


substrates [12-14], neither technology has developed to the point where it can be used in commercial implementations in five years.  All-Si modulators [10, 11] have been either too large, due to the weak physical interaction between the light and the material, or orders of magnitude too slow.  AlGaAs/GaAs modulators on Si [12, 13] suffered from process imcompatibilities with the standard growth and fabrication procedures of the mature Si electronics industry – growth of AlGaAs on 3° off-axis Si substrates, high temperature substrate cleaning, and the introduction of Ga into the Si material system.
A more realistic approach is to fabricate the optoelectronic transmitter chip separately from the CMOS, and then to combine them using hybrid integration.  Many optical-interconnects   researchers   have   utilized   a   commercially-available   hybrid integration technology known as flip-chip bonding.  A high-quality bonder can align the CMOS chip to the optoelectronic chip within 1 µm laterally [15].  Flip-chip bonding has been shown to integrate more than 16,000 devices on a single chip [16] as well as at the wafer-scale [17].   Typically, one chip has its metallic contacts coated with bumps of indium, a metallic element with a low melting temperature which alloys with gold under temperature and pressure [4, 5, 18].   Indium can therefore be used as a metallic glue, electrically connecting the two chips at the necessary spots.   Other metals can also be used, such as in gold-gold [19] or gold-tin [20] eutectic bonding, though the low temperature indium-based process is preferable for CMOS chips which are vulnerable to high-temperature processing steps.  If necessary, low-viscosity epoxy can be added to fill the space in between the two chips in order to provide mechanical integrity [4, 5].


  Integration of optical system with optoelectronic chips

The design of the optical system will often be simplified by a transmitter device that is not sensitive to misalignments of the optical system to the optoelectronic devices. Since the packaging of photonic components is a significant cost (up to 60-80 % of the total cost of manufacturing the device) [21], misalignment tolerance may be an important factor in optical interconnects breaking into the marketplace.   A simple experiment by Prof. K. Goossen at University of Delaware found that guiding pins on a standard MT connector result in a misalignment of approximately ±4 µm [22].  An ideal optoelectronic device would tolerate misalignments of this order without a degradation in performance.


Waveguide devices are challenging to align because the small optical transverse mode must be positioned properly within a fraction of a micron with respect to the optical system.  Surface-normal modulators generally avoid this problem as long as the physical size of the device is great enough to allow for such a misalignment.  Yet, modulators still require an external laser source that must be aligned within the specifications. Improvements in optical system tolerances, packaging, and alignment/bonding tools may relax these requirements somewhat.
         Summary of Optoelectronic Transmitter Requirements

Considering the electrical and optical systems has led us to a variety of requirements or restrictions on our optoelectronic transmitter.  The device should exhibit a high contrast ratio (≥ 3 dB) over a wide wavelength range (≥ 10 nm) with only a low voltage drive (~ 1 V).  Operation at a high bit rate ( 10 Gbps) should dissipate minimal power (< 10 mW).   Fabrication of 2D arrays of compact surface-normal transmitters should be simple and inexpensive.  Tolerance to misalignments between the device and the optical system (≥ 5 µm) would reduce the cost of packaging.  

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